The present invention relates to a baseband signal receiving circuit, a sample clock extracting circuit and a word detecting circuit, and is applicable to, for example, a radio signal receiver, which complies with a bluetooth system corresponding to a kind of short-distance communication system.
A bluetooth receiver of a bluetooth system corresponding to a radio communication system using radio signals lying in a 2.4-GHz band has an RFIC (Radio Frequency Integrated Circuit) transceiver for taking out a baseband signal having a symbol transmission rate of 1 MHz from the radio signals lying in the 2.4-GHz band, a baseband receiving circuit for performing packet assembly from the taken-out baseband signal (digital serial signal), etc.
The transmission of the baseband signal is started with a time slot boundary set for each 625 μs. A 4-bit length preamble is first transmitted and synchronous words having 64-bit lengths are then transmitted. Finally, a variable-length payload is transmitted. The baseband receiving circuit of each bluetooth receiver monitors whether each of the 64-bit length synchronous words exists in an input baseband signal. When the synchronous word destined for itself has appeared, the baseband receiving circuit takes in or captures the contents of a payload following it and processes it.
The conventional baseband receiving circuit simply detects only the rising edge and/or falling edge of a received baseband signal to reproduce a clock signal, and samples the baseband signal, based on the clock signal to thereby restore a symbol.
However, the conventional baseband signal receiving circuit is accompanied by a drawback that since it simply detects only the rising edge and/or falling edge of the received baseband signal to thereby reproduce the clock signal, the accuracy of reproduction of the clock signal is degraded and the accurate detection of synchronous word cannot be carried out when noise is contained in the baseband signal and a frequency drift exists in the received baseband signal, and even if the detection of the synchronous word is allowed, a bit error occurs in payload reception subsequent to its detection.